1. Field of the Invention
The invention relates to a program for an error correcting process included in an error correcting device, method, and medium and, more particularly, to a technique for performing an error correcting process to digital data to which a code for detecting and correcting an error was added.
2. Related Background Art
Hitherto, in case of recording or transmitting digital data, it is a general way to add additional data for detecting and correcting errors of the digital data. By checking the additional data at the time of reproduction or reception, an error occurring at the time of recording or reproduction of the digital data or during the transmission can be detected and corrected. A Reed Solomon code which is used as such additional code is excellent in an ability for detecting and correcting an error and is used in many signal processing systems.
FIG. 1 is a block diagram showing a general error detecting processing device using the Reed Solomon code.
In FIG. 1, reference numeral 101 denotes an input terminal; 102 a syndrome generating circuit; 103 a data bus; 104 a selector circuit; 105 a syndrome memory A; 106 a syndrome memory B; 107 a bus control circuit; 108 a circuit for calculating an error position and an error value; and 109 an output terminal.
Digital data of a predetermined unit to which the Reed Solomon code was added is inputted to the syndrome generating circuit 102 through the input terminal 101. The syndrome generating circuit 102 generates a syndrome on the basis of the Reed Solomon code of the digital data of each unit. After the syndrome of the digital data of each unit was generated, it is inputted to the selector circuit 104 via the data bus 103 while being controlled by the bus control circuit 107. The selector circuit 104 alternately records the syndromes of the digital data into the syndrome memory A 105 or syndrome memory B 106 on a predetermined unit basis.
The syndromes of the digital data recorded in the syndrome memory A 105 or syndrome memory B 106 are alternately read out by the selector circuit 104 while being controlled by the bus control circuit 107 and are inputted to the error position and error value calculating circuit 108 through the data bus 103. The error position and error value calculating circuit 108 executes an Euclidean method, a chain search, or the like to the syndromes generated from the digital data of a predetermined unit, thereby calculating the error position and the error value. Arithmetic operation results are outputted from the output terminal 109 and the errors are corrected by an error correcting circuit (not shown).
As mentioned above, in case of detecting and correcting the error of the digital data by using, for example, the Reed Solomon code, it is generally necessary to sequentially perform a generation of syndromes, a calculation of an error polynomial, a chain search, and a calculation of the error position and the error value. In order to detect and correct the error in the digital data of a predetermined unit every unit, it is necessary to sequentially execute a series of those processes. In the conventional device, the generation of the syndromes of each unit and the calculation of the error position and the error value are alternately processed by using one selector circuit and two syndrome memories.
However, in case of processing two kinds of digital data (for example, digital audio data and digital image data) in parallel by using the conventional device as mentioned above, one selector circuit and two syndrome memories are further necessary. Therefore, for example, in case of processing a motion image with an audio sound, it is necessary to process the digital audio data and the digital image data in parallel within a predetermined period of time, so that there is a drawback such that a circuit scale is large and large costs are required.